Impedance matching: An example

Impedance matching is a key task in RF design and and also in lower frequency design where power transfer is an issue. A number of techniques exist to do this. Some are built-in scripts for advanced CAD programs while other techniques are manual. One of the techniques used quite commonly is the L -Section impedance matching technique. It is of interest to examine this technique. A recent technical memorandum released by the techteam at Signal Processing Group Inc. describes in some detail the matching of an antenna impedance and a resonant circuit associated with the antenna. It shows the detailed development of the matching circuit and checks that can be made to evaluate it. A PSPICE simulation is also shown along with the .cir file and plots. Interested readers are directed to the SPG website at http://www.signalpro.biz > "Engineer's Corner" for details.

The quarter wave matching transformer

In many high frequency applications matching a transmission line of known impedance to a known resistive load is an operation that is done over and over again. A simple way to do this is to use a quarter wave transformer. This concept is explained more fully in a paper released by Signal Processing Group Inc. recently. Interested readers may access this at the "engineer's corner" in the SPG website located at http://www.signalpro.biz.

Series to parallel conversion of LCR circuits

In a number of applications, specially in impedance matching LCR circuits may undergo series and parallel conversions. These conversions leave the performance of the circuit unchanged. They simply change the configurations to provide for a more appropriate architecture for the operation ( whatever that may be). A simple paper released by Signal Processing Group Inc. describes a method to do this. Interested parties may go to the website at http://www.signalpro.biz and access the paper from the "Engineer's Corner".

IC design and reliability: Failure rate and the FIT.

The failure rate for ICs is defined by: (Number of devices failed/Total number of devices tested)(1/time). The units can be stated as failures per device hour. This is an important parameter and has to be considered as early as possible in the design of the device. A unit called a FIT can also be defined. In this case a FIT = one failure per 1 billion device hours of operation. A FIT can be used to evaluate devices and distributions. The simplest model of failure is given by the parameter called the mean time to failure or MTTF. MTTF = 1/KF. Here KF is simply the failure rate per unit time. This is used in the exponential model which is very popular. The exponential model is simply expressed as: Fail(t) = 1.0 - exp(-KFt). This model is easy to use and calculate and can be used to assess the design of the device based on a failure rate model. Data is usually available from foundries for the use of this model. Please visit our website at http://www.signalpro.biz for more ASIC and module design and manufacturing information. Please contact SPG for detailed information on more extended types of failure expressions and their use in the design of devices. i.e how these failure parameters mesh with design parameters that allow the design to be more robust in terms of MTTF or failure rate.

IC design and reliability issues

Reliability is a key issue with complex ASICs. Reliability data is important to the cost and long term performance assessment of the device and indirectly of the entire module, and ultimately to the system itself. The operating conditions that affect reliability are: (1) Temperature (2) Humidity (3) Temperature cycling (4) Voltage stresses (5) Current stresses. These stresses if applied with sufficient magnitude, will cause rapid deterioration and ultimate failure of the device. So it is only logical to use these stresses to evaluate reliability of the device. JEDEC stress testing standards are one way to come up with set of approaches to assess the reliability of the device. The website is http://jedec.org.

IC design for min(TM)ASICs and macro(TM)ASICs

We have divided the RF/Wireless ASIC types that we develop into two categories. These are the miniASIC and the macroASIC. This nomenclature applies to the functionality, size, complexity, cost and risk of the device. A miniASIC is a device with very few elements on it. It is small in size ( remember size differentiation; 50 mils on a side is small, 100 mils on a side is medium and 250 mils+ on a side is large for analog, RF, wireless or mixed signal ASICs). Examples are: 2 power/high voltage MOSFETs, a closely matched high frequency differential stage, multiple bipolars or MOSFETs on a chip (used largely for bread-boarding and proof of concept sometimes. Although these can be valuable adjuncts to a board design in production as well.) A low logic gate device, more logic gates than a CD4000 series device perhaps, but less than a large digital design ( 5k gates+). Matched resistors, capacitors, inductors and interconnect on a chip. A macroASIC on the other hand lies at the other end of the spectrum. It is a larger device,(definition above), it is more complex and costs more. In our experience both types come in handy when developing systems. The miniASIC can be used as part of glue circuitry ( when the exact device you need is not available of the shelf and it has to be cheap). The macroASIC is the device of choice when you want to sweep many discrete components on to a piece of silicon ( or GaAS, SiGe, GAN, etc)to provide enhanced performance, reduction in cost, safety of R&D, increased reliability and manufacturability, testability, and so on. Signal Processing Group Inc., provides both types of devices. The only drawback is of course that you cannot just go out and buy something quickly off the shelf. Lead times for these ASICS is of the order of 2 to 10 weeks. However, if the planning takes this into account then mini and maro ASICs become a sound choice. Please visit our website at http://www.signalpro.biz for more info.

Image reject mixer: Description and explanation

Image reject mixers are interesting circuits used in RF/wireless receivers to avoid the problems associated with the image frequency. ( To read about the image frequency please search for "image frequency" in this blog). A recent white paper from Signal Processing Group Inc, examines the operation of the image reject mixer and provides a fairly detailed explanation of the operation for interested readers. Please visit our website at http://www.signalpro.biz > Engineer's corner.

Dot rule for magnetially coupled circuits (baluns and transformers)

In a magnetically coupled circuit like a balun or a transformer the phasing of currents and voltages is commonly indicated by the dot rule. Place a dot at either end of the primary. Drive this end positive ( for example). Measure the voltage at the secondary ends. The end of the secondary which is also positive ( or generally in phase ) with the primary end is also indicated by a dot. The other end of the secondary will be 180 degrees out of phase. Current flowing into the dotted terminal at the primary end will cause the current to flow out of the dotted end of the secondary and vice versa. Visit our website for more information and articles of interest at http://www.signalpro.biz.

VSWR control using a power detector

High levels of mismatch, for example in a transmitter or any output power device, can sometimes cause catastrophic failure of the device and its associated subsystem. Depending on the application this can be a severe problem. An interesting approach to prevent or control these types of failures is the use of an on chip integrated power detector. The power detector is used to estimate reflected power and if the VSWR (matching) gets really bad ( due to aging, component failure or other such causes) the power detector either signals a problem before the it reaches irreversible levels, or executes automatic control of VSWR. Please visit our website at http://www.signalpro.biz for other interesting articles or just information.

Injection locking in transmitters

An interesting titbit of knowledge about direct conversion transmitters is the phenomenon of injection locking. If the transmitter is such that right after the modulation the signal goes to the driver/PA ( i.e there is no up-conversion or filtering of any kind between the PA and the modulator and its associated LO, then feedback from the output can cause ( in a number of cases) the LO frequency to shift and lock to another harmonic of a feedback signal. A number of techniques to alleviate this have been investigated because the direct conversion technique is considered by some to be simple and easy to handle ( keep chip size small). For more information or articles visit our website at http://www.signalpro.biz.

High voltage IC design considerations

High voltage IC design is, in our opinion, an art. In terms of the implementation of the functions, simulations and layout it is a taxing endeavor. A number of fabrication vendors who offer high voltage technology try to make it as easy as they can, sometimes by providing some IP. In spite of this there are number of issues and challenges that come up, which the designer only learns through experience. When you are designing at voltages in the range of 500V to 700V and at high currents as well, it becomes a real challenge. It helps if the designer understands some of the parameters of the high voltage device, related to its operation. A white paper on this subject is available in the Signal Processing Group Inc., website located at http://www.signalpro.biz in the engineer's corner. An old adage says " when you are working with high voltage and specially on the bench, keep your left hand in your pocket!"

Wireless design: The 2-s complement number and DSP.

More and more DSP ( digital signal processing) techniques are being used in most complex circuit designs including IC design. In general dsp requires the use of binary numbers. After all dsp is akin to a set of computations yielding a result which may or may not be converted into an analog signal. Both ways. At the input using an A/D and at the output using a D/A. In fact this is the way many recent designs in wireless are being implemented. The number system most often used is the 2-s complement number system. To refresh our memories, a 2-s complement number is formed by taking the binary representation of a decimal number, inverting the bits and then adding a "1" to it. This generates the 2-s complement. A wealth of articles exist on this in the literature and the web. The nice thing about the 2-s complement number is that addition and subtraction becomes very easy. An example is a dual modulus frequency divider. In this circuit we have two counters that start with a loaded number, an initial seed, and then this number is counted down. When the loaded number goes to zero a reset occurs. This is almost the very basic operation required in a dual modulus frequency divider. Note how easy the countdown becomes when implemented with 2-s complement numbers. Have the initial storage in a set of FFs, at each clock invert the contents of the FFs, use a simple adder, add 1 and at the falling edge of the clock recapture the results back into the storage FFs. Each time the clock occurs the FFs count down by '1'. Please visit the Signal Processing Group Inc., website located at http:/www.signalpro.biz for more information on our unique services, technology and technical articles. Contact us on this or other blog posts or articles as needed.

IC Design primitive components available in semiconductor processes

When an engineer is in the process of designing a board level product, he or she instinctively starts a search for off the shelf components that are required to implement the architecture that the engineer has chosen to satisfy the requirements of the product. Yet in some cases a particular function in the architecture cannot be realized using an off - the - shelf component. At this point the engineer may decide that he/she needs a custom part, sometimes an ASIC. The question is what kinds of typical primitive devices can a semiconductor process provide so that the required ASIC can be implemented. A reasonable list of such components is given in http://www.signalpro.biz/asictools.html for the interested reader. Please also visit http://www.signalpro.biz for more information.

Wireless design: Integrated or chip antennas

As the RF/wireless boards get smaller and smaller, as the active and passive device sizes shrink challenges of the antenna loom larger. Antennas may take up a large percentage of space. Even a few years ago PCB antennas were a solution but that is now no longer a very acceptable solution. The migration path for really small size antennas is the chip or integrated antenna. This tiny device becomes a practical solution when space is at a premium. A number of vendors have started offering this device and depending on the system parameters could be a pragmatic solution. Contact SPG at http://www.signalpro.biz for further details or discussions.

Wireless design: The level of simulation required for a first pass sucess.

What does the level of simulation have to be to predict the level of success of an IC? What does "level" imply? In the context of simulation of an RFIC, level implies how much of the RFIC was included in, perhaps a circuit simulation in a "SPICE-like" simulator. The reason this is so important is that in many cases it is not possible to simulate a full chip, specially if the chip contains mixed signal elements or large and small time constants, etc. Therefore the level of simulation for first pass success should be 100%. i.e the full chip was simulated under operating conditions that are a 100% identical to actual. It is of course not really possible to do this. It usually takes a combination of CAD tools to do this starting from MATLAB-SIMULINK, through circuit simulation and perhaps IBIS type modeling and simulation. In a few cases even more extensive simulation may be performed using Thermal Simulators. So the question remains:what is the level of simulation required for a high degree of confidence in the success of the chip? The answer must surely be that when all the CAD~tools have been used to their ultimate capacity, add a large measure of engineering judgment. This is the only way currently known! Please visit Signal Processing Group Inc.'s website at http://www.signalpro.biz for more technical papers and information.

Wireless design: ASIC versus an analog or RF/wireless/MMIC ASIC

The term ASIC may be a misnomer for an analog or RF/wireless/MMIC device. When we think ASIC we seem to equate the term to a large digital chip done in very fine line technology costing many millions of dollars, taking a long time, fraught with risk and fear. That is an apt description of the large digital ASIC in our view. However, an analog or mixed signal or RF/Wireless/MMIC custom chip does not play in the same ball park or even in the same neighborhood. For starters these types of devices tend to be smaller and in terms of number of active devices less complex. Sometimes an analog or mixed signal or RF/wireless/MMIC device may only be a couple of devices! Perhaps its time to come up with a new buzzword for these types of devices. Please check out Signal Processing Group Inc website at http://www.signalpro.biz for more information on these helpful devices. If you register you can get a userid and a password for protected areas of the site that contain much valuable information.

Wireless design: Manchester decoder encoder

A final design of the manchester decoder and encoder was completed in record time. The encoder is of course, the simpler part ( or so they say). However, it turned out that when loopback was applied to the encoder decoder combination the source of malfunction in the initial iteration was traced to the so called easy part, the encoder. So designer beware, the decoder only seems more difficult. It is the encoder that will get the designer in trouble.There are few "nitty-gritties" that have to be addressed.For more on the subject contact Signal Processing Group Inc., at http://www.signalpro.biz.

Wireless design: The case for ASICs.

Recently we had a conversation with a design engineer involved in the implementation of a wireless communication system. His input was interesting . He indicated that even though he got a majority of his devices right off the shelf, it turns out that he still had glaring gaps in his implementation . The reason for this, was that his application required some customization which could only be done using ASICs, both digital and analog. His initial solution to the digital problem was the use of programmable logic devices ( PLD). However the cost of the PLD in volume was prohibitive. So ultimately an ASIC was the only solution. Certain analog functions were also put into an ASIC for the same reasons. So the lesson is that although the design engineer can buy off the shelf devices for a majority of his design implementaion he cannot entirely fill his BOM with standard devcies and for the optimum solution may require one or two ASICs. Costs for ASICs can be made quite low. Please visit http://www.signalpro.biz for more information about ASIC implementations.

4 Bit synchronous counter design revisited

Synchronous logic is usually preferred because everything gets synchronized to a clock and race conditions are generally avoided in design. A look at a 4 bit synchronous counter showcases the method quite clearly and may be of use to practitioners of the art as a refresher and to designers new to the field. A brief paper on the design of a 4 bit synchronous counter has been released by Signal Processing Group Inc., and may be found in the "Engineer's corner" at http://www.signalpro.biz for interested users.

Manchester decoder

Manchester codes are a way to combine clock and data into a single stream and send it serially over a communications link, wireline or wireless. Manchester encoding is relatively simple and is basically a modulo-2 operation with the variables being the clock and data. The clock is actually twice the frequency of the original data clock. Care must be taken to make sure that there are no glitches or spikes in the resulting waveform. Manchester decoding on the other hand is much more involved and is not a trivial operation. There are a number of techniques to do this. Some are software based, some are hardware based. Some are based on time delays while others are based on PLL type circuits. The techteam at Signal Processing Group Inc., has analyzed a number of these techniques and come up some circuits that do Manchester decoding. Interested users may contact SPG at http://www.signalpro.biz for details. A NDA may be required.

EEPROM substitute for non volatile ID storage

After having struggled for a fairly significant amount of time to design a circuit to read EEPROMs for storage of IDs for a radio communication system, it suddenly hit us that we did not need to do this. Designing either a hardware circuit to use I2C based EEPROMs or a software equivalent is an experience that we think we would not like to have again if we can avoid it. From datasheets that the designers never have their own people use to involved and intricate operation ( WRITE, READ etc); its a nightmare. On the other hand we came up with a simple way to store IDs with almost trivial ease. Its as they say " a no brainer". For design engineers who are fed up with the EEPROM method, we say try this other technique and you will see how easy it is and how CHEAP it is! Contact us from the Signal Processing Group Inc.'s website at http://www.signalpro.biz for a discussion. You may have to sign a NDA but if you are really serious then this should not be a show stopper.

I2C interface and Manchester encoder chip

A fairly common operation in communications is the sending of an ID over a radio channel to establish a secure link. One method to do this could be to use a serial EEPROM ( 128 bits typically) with an I2C interface and a Manchester encoder. The receiver has a decoder which recovers the signal, clock and data. A chip that can do these types of functions would be a really useful device. Except that a search on the web failed to yield a product like this. One or two semiconductor companies have Manchester encode/decode devices but they are prohibitively expensive in addition to not having the needed I2C interface, serial shift register etc. etc.. A PLD could be used to do these functions except that in volume the PLDs may not be competitive. Looks like its time to do one of these chips!

PLL ( Phase locked loop) design using Analog Devices freeware.

We have been looking at various RF/Microwave design freeware tools recently. One of the tools that we looked at closely is the Analog Device ADsimPLL tools. This allows the design of PLLs and synthesizers using AD's devices which come pre-programmed in the software. The tool is interactive and fairly intuitive and user friendly. There are of course, a few challenges but considering that one pays nothing for its use it is well worth the time spent on analyzing and using it. We designed a 1.83 Ghz loop using the AD4360-7 device. The tool allowed us to calculate the various PLL related component values and provided a quick assessment of the operation both visually and textually. We would have liked to see some additional small features in the tool but all in all our assessment of the tool is quite positive. For further information on this or on PLL design activity at SPG, please visit our website at http://www.signalpro.biz and use the contact menu item for any further discussions or questions on our experience.

Estimating the signal band noise in delta-sigma modulators

Sigma delta modulators are popular devices used in a multiplicity of applications. One of the most prolific of these is the A/D converter. A delta - sigma A/D basically consists of a delta-sigma modulator ( typically first or second order), followed by a decimation filter. The modulator operates in such a way that it generates a high pass response for the noise in the system. This response is known as the NTF or noise transfer function of the modulator. In this way the modulator suppresses noise within the passband but allows the out of band noise components to have a high pass characteristic. A low pass system of decimation filters removes this latter noise also. It becomes imporatnt,in the practical sense, to estimate noise in the passband. An expression can be developed to do this for higher order modulators with fairly accurate results. This subject is dealt with in a recent brief paper released by Signal Processing Group Inc. It may be found in http://www.signalpro.biz> "engineer's corner".

RF/Wireless/MMIC freeware

A survey using search of RF/Wireless/MMIC freeware on the web led to a nice harvest of freeware routines that provide useful tools for those of us who may want to use these types of programs. It is well known that a number of EDA companies sell fairly expensive RF/Wireless/MMIC programs. For many designers it may be difficult to buy these because of the cost. For these users the freeware that is available on the web might be a partial solution. The freeware programs are not as beautifully formatted but appear to be reasonably accurate when compared to results provided by the more expensive packages. An ongoing interest for us is to take a look at these freeware programs and assess their usefulness and price/performance ratio. A useful package distributed free by Agilent is the first on our list. It is called "appcad" and may be downloaded free. Apart from the marketing type information in this package a number of useful tools are included. It certainly deserves a close look.

Logarithmic amplifiers ( LOG AMP); A useful component.

Logarithmic amplifiers or Logamps as they are commonly called are very useful components. They are used in communications, RF and wireless systems, cell phone base stations, audio systems, and power control to name a few application areas.. A typical use in RF/wireless is in the RSSI ( received signal strength indicator) circuit. The logamp can be deceiving in its functionality so a basic description is of help for those who plan to use it. A paper on this component and its basics is available on the Signal Processing Group Inc. website http://www.signalpro.biz under the "engineer's corner" menu item.

SINAD: What is it and why is it important?:

SINAD is figure of merit typically for radio receivers or similar devices. It may also be used in other applications. SINAD compares the signal power, the noise power and distortion power of signals. The specification is usually used in an audio sense. i.e the quantity under consideration is the quality of the received audio. A report on SINAD, its definition and other related parameters is available in the Signal Processing Group Inc., website at http://www.signalpro.biz > engineer's corner for interested parties.

Design considerations for integrated circuit RF/MMIC power amplifiers

Integrated circuit RF/MMIC power amplifiers are getting more and more popular. The PAs can be standalone or part of a larger device. Multiple technologies exist for the implementation of the circuits from CMOS to III-V. For the designer of these circuits different technologies present different challenges. In a brief paper by Signal Processing Group Inc., technical team, some of these issues are explored in a cookbook fashion. The paper may be found in the SPG website at http://www.signalpro.biz>engineer's corner.

SFDR or spurious free dynamic range

Someone asked a question about the significance of the SFDR. The answer to the question was as follows. ( For experienced receiver designers this is old hat of course.)

The SFDR is a specification which allows a reviewer to gauge the range of input/output signals that a receiver can handle while still in a linear range of operation.

The basic mathematical definition is:

SFDR = (2/3) x (IP3 - Noise floor)

The noise floor is defined as:

Pn(output) = kTBGF.

Where k = Boltzman's constant
T = Absolute temperature
IP3 = Third order intercept point at the output
G = Gain of the system
F = Noise factor.

Using this definition the SFDR can be calculated as:

SFDR = (2/3)(IP3 + 174 - 10logB - G - F).

Here the 174 represents the kT noise.

All quantities in dBm.

Thus if IP3 is known and gain is known , the input IP3 is known. The input signal should not exceed this as 3rd order distortion products will emerge from noise beyond this level at the input.

So an obvious conclusion is: Keep IP3 as high as possible and the noise floor as low as possible for high SFDR. Typically IP3 is about 11.6 dB above the 1 dB compression point of an amplifier.

Also it must be stressed that all components in a system, that have the potential of introducing distortion, should be assigned an IP3. Ultimately the final IP3 is the cascade of the individual IP3's.

Two useful impedance matching techniques

For maximum transfer of power from a source to a load, the source and load impedances must be conjugate matched. A number of techniques to do this have been developed. This post looks at two fairly simple and very popular ones. The L - section match and the cascade transmission line match. Simple analytical techniques are used to do this and described in the paper. The calculations can be done with a simple calculator. In order to access the detailed description, interested readers are directed to our website at www.signalpro.biz. Follow the links in the website to engineering pages>engineer's corner and then select the paper from the list on the page.

Receiver spurious response rejection

This is a very interesting specification for which no clear definition seems to exist. Note definition 1.0: Spurious rejection is the ratio of a particular out of band frequency signal level required to produce a specified output to the desired signal level to produce the same output. Definition 2.0: " All superheterodyne receivers have a potential for responding to frequencies other than the desired frequency channel. This needs to be minimized by designing in spurious response rejection by proper choice of the IF frequency and use of RF filters. 70 to 100 dB is achieveable in practical receivers." Definition 3.0: Ratio of desired signal to the total of all spurious signals at an offset of channel spacing in dB. What are these spurious responses being considered? A sample of these signals is described below:
(1) Image frequency/ frequencies.
(2) Half - IF.
(3) Straight IF pickup.
(4) High order spurs result from combinations of harmonics ( m,n) which result in spurious responses so close to the desired frequency response that they cannot be filtered out.
(5) A whole family of spurious responses of type ( 1 x n) is the n x LO spurs which can be troublesome if the RF front end has return responses or re-resonances.
(6) Second image in dual conversion receivers.
(7) Spurious signals present on the LO signal itself.
(8) Transmitted signal in half duplex radios assuming the role of a LO.

These responses are difficult to measure because of signal generator wideband noise.

Nevertheless this is a key receiver specification, and needs to be understood and above all, used and specified clearly.

RF/MW ESD matching using resonant circuits

An interesting technique that finds extensive use in RF/MW ESD circuits and complex matching circuits is the concept of resonating out reactances. Taking the case of the ESD circuit we find that in the most usual case RF/MW ESD circuits ( as other ESD circuits do) use some form of diodes to protect sensitive inputs on an IC. This of course leads to a parasitic capacitance which causes loading and mismatches. In order to eliminate the effect of this capacitance, at a single frequency an inductor can be used in parallel with the parasitic capacitance. The value of the inductor is chosen to resonate with the parasitic capacitor and therefore at the resonant frequency the pair becomes invisible leaving only the resistive part to be matched or considered. This is a simple technique which finds wide application in a number of critical circuits. Obviously the limitation is the single frequency characteristic. However, with some subtle manipulations it can also be used in wider bandwidth applications.

Noise figure versus input referred noise

If we use the specification for a low noise amplifier, invariably the noise performance is a Noise Figure. However, in a particular system design we calculated the input referred voltage that could be a limiting factor for the very first stage LNA. The issue was how to convert from the noise figure of a selected LNA ( from Analog Devices no less) to the input referred noise voltage to make sure the amplifier was being chosen correctly. Well here is the conversion at least in one form.

Note: The noise factor is simply 1 + NA/Ni. Ni is the noise power coming in from a 50 Ohm matched source and is equal to -174 dBm/Hz. ( Pretty standard usage).

The noise voltage being generated by the 50 Ohm source is vni=4.46E-8 Vrms/Hz. This can then be used to compare whether the amplifer will work with a particular noise figure ( from the expression 1 + NA/Ni).

Check and see if the number NA, the noise input referred power generated by the amplifier itself, converted from a voltage to power is acceptable or not. Must remember to use the impedance level of 50 Ohm. Simple?


Example: If the NF is = 0.8, then 1+ NA/Ni = 10**0.08 = 1.2 ( approx). We can calculate vna as above for vni.

Here is a note on input noise. It has been found that the -174 dBm/Hz should be modified to -162 dBm/Hz for the rural environment in the US and to -98 dBm/Hz for the urban environment. The -174 dBm/Hz is therefore a theoretical figure used to specify and calculate noise figures and noise factors!

Yes, another thought; we need to make sure that the derivation for the noise factor is elaborated: Here it is:

Noise factor F = SNRi/SNRo where i stands for input and o stands for output.

So = Si X G ( G = Gain)
No = [Ni noise power from the 50 Ohm source + NA, noise power generated by the amp].

F = [Si/Ni] / [GSi/G(Ni+NA)] = 1 + NA/Ni.

Also for other items of engineering interest go to our website at www.signalpro.biz.

The printed inverted F antenna

The printed inverted F antenna ( as opposed to the planar inverted F antenna) is a useful antenna capable of being printed right on the PCB of a wireless product. In an attempt to understand this antenna in more depth, the technical staff of SPG researched the topic. The result was that, there seems to be almost no information on this type of antenna in any of the typical texts on antennas. The only viable source for information on this antenna is the web. This too, is fairly sketchy. Our technical staff has now prepared a white paper containing the type of information on this antenna needed by practising engineers, and will be releasing it shortly via this blog, and in the engineering pages of the website at www.signalpro.biz.

More on the inverted F antenna analysis

An analysis of the printed inverted F antenna was carried out using the NEC2 program. This program is available in the public domain. It models antennas as wires.
One can set the wire radius. The disadvantage of the program is its inability to model dielectrics as substrates. However, in spite of this, with a bit of smarts a lot of information about antennas can be obtained from it. In case of a printed strip, Balanis's book provides the conversion between the wire radius and the width of the strip for those who may be interested in further analysis. Our experience has been that no matter how much modeling is done ( as we did follow up with ADS MOMENTUM)in the end the antenna ends up being tuned by somewhat of a trial and error method. In our opinion both procedures are important. We need a quick way to assess the antenna operation using a program like NEC2 which is surprising fast and a more refined means of simulation like ADS or FEKO. Check out the article in the SPG website ( http://www.signalpro.biz) under engineer's corner for printed antennas. ( Note: "Engineering pages"
has now been changed to "Engineer's corner".

A first pass success: Silicon proven RF Amplifier

A first pass success is always welcome. When the sucess is a high frequency device it is doubly so. The latest addition to the high frequency, silicon proven ASSP portfolio, is a high frequency, wideband amplifer fabricated in a 0.35um SiGe process.

It is fairly general purpose and can be used as gain block, an LNA etc. The basic features are as follows:

Features:

Usable frequency gain = 100 to > 2500 Mhz
19 dB typical ac gain at 900 Mhz, VCC = 2.7V
NFMIN = 1.2 dB at 900 Mhz
NFMIN = 1.5 dB at 2500 Mhz
1 dB compression point at 900 Mz = 2.9 dBm
1 dB compression point at 2500 Mz = 0.9 dBm
OIP3 at 1.5 Ghz = 15.0 dBm
OIP3 at 2.5 Ghz = 10.0 dBm
Power supply from 2.7 to 5.0 Volt
Power supply current typical = 4.7 mA
Reverse isolation s12 = -48.0 dB min.

The device was tested from -55 Degrees C to 125 Degrees C. An extended frequency test was also done at 5.0 Ghz. The gain dropped to 17 dB. Other parameters were also slightly affected.

Anyone with interest in this device and its development may contact the author via the website located at www.signalpro.biz.

RF ASIC design:Second order system analysis

Second order systems appear frequently in the design of analog systems as well as digital systems. In most cases these types of systems are difficult to understand analytically and designers must resort to simulations and empirical assessments.
Examples of these types of systems ( or circuits) are PLLs, switching power supplies, analog equalizers, mechanical servomechanisms, filters etc. There are some expressions available to do approximate analysis and design before resorting to long simulations or empirical data gathering. These are mainly based on the second order characteristic equation. Solution of this equation yields at least two very useful quantities. The natural damped frequency and the damping ratio. Use of these parameters can greatly facilitate the analysis and design of second order systems. For a brief cookbook style treatment of this analysis please read the article in our website www.signalpro.biz under engineering pages.

Analog ASIC and RF ASIC success factors

An analysis of several success factors in analog/mixed signal/RF ASIC design and manufacture turned up a number of interesting facts. There were many reasons for success that have been already described elsewhere in this blog. However, the interplay of relationships and their impact on the success of ASIC design and development was not touched. Much to our surprise the analysis of over 100 ASIC projects executed in SPG indicated that when significant success was achieved, not only were the obvious success factors present ( see the blog entry) but a key factor was the customer interface. (1) The customer interface was a technical person who was really closely involved in the design from the system side; (2) the technology that was being used to implement the ASIC was an excellent fit to the requirements; (3) the fabrication vendor relationship was strong and close with SPG; then the probability of clear success was over 99% (conservatively). We did not find a single failure in our list of 100 projects when these conditions were also met. ( In addition to the success factors quoted elsewhere in this blog. The very first entry in the blog since its inception). Thus the objective of this entry is to add this success factor to the list. The search for success in the analog/mixed signal/RF ASIC design and development is critical for our success.

Half IF spurious response and the second order intercept point

An irksome 2nd-order spurious response called the half-IF (1/2 IF) spurious response, is defined for the mixer indices of (m = 2, n = -2) for low-side injection and (m = -2, n = 2) for high-side injection. For low-side injection, the input frequency that creates the half-IF spurious response is located below the desired RF frequency by an amount fIF/2 from the desired RF input frequency. The desired RF frequency is represented by 2400 MHz, and in combination with the LO frequency of 2200 MHz, the resulting IF frequency is 200MHz. For this example, the undesired signal at 2300 MHz causes a half-IF spurious product at 200MHz. For high-side injection, the input frequency that creates the half-IF spurious response is located above (by fIF/2) the desired RF. Note that high side injection implies that the LO frequency is above the RF frequency and low side injection implies that the LO frequency is below the RF frequency.

The second order intercept point is used to predict the mixer performance with respect to the half IF spurious response. For further details please see the article under engineer's corner/engineering pages in our website at www.signalpro.biz.

Rf power Amplifiers: Load line analysis

The most basic of analyses is the load line analysis for RF power amps ( or for that matter, any power amp). It is true that we all learned this in our formative years. However, it is equally true that we graduated to high performance complicated CAD programs that do so many things in an invisible manner that we no longer want to know ( sometimes) how the tool got to where it got to. A somewhat similar condition is common in digital ASIC design where the designer no longer needs to know how the logic gate works or what its device level parameters are. He or she simply writes the code that enables the design on a high level of abstraction. A brief expose of load line analysis is presented in a newly released paper by SPG and may be found at www.signalpro.biz under engineer's corner for interested readers.

Image frequency in RF and wireless circuits

The image frequency in Rf/wireless receivers is an issue that has to be understood by radio designers and tackled for robust design. The image frequency is a so-called spurious signal which can cause a number of bad effects.Its origin lies in the mixing of multiple frequency signals in the receiver mixer. A paper released recently by Signal Processing Group Inc., describes this effect in simple terms so that an understanding of the effect may be obtained by interested designers. The paper can be accessed in the engineer's corner at http://www.signalpro.biz.

The role of the heat sink in power and RF IC design

As power circuit designs and devices proliferate in products such as LED drivers, HID lighting, motor control and electric vehicles it is becoming important to understand themal effects in active devices. All active devices dissipate power, and power active devices dissipate lots of power. This power dissipation creates heat which must be removed by some means to prevent excessive heat buildup inside a package or module which ultimately would lead to destruction of the appliance, circuit or device. One of the ways devices can be made safer, thermally that is, is the use of a passve heat sink. The role of the heat sink in active device thermal management is explored in a recent report released by Signal Processing Group Inc.'s technical staff and may be found in: http://www.signalpro.biz>engineer's corner>heatsink.pdf.

Random signal generation in PSPICE/SPICE

The SPICE programs we use for circuit simulation do not have a direct way to generate random waveforms. i.e. there is no voltage or current source which can be attached to a circuit node and which can generate a random signal for analysis. As a result we had to develop code on MATLAB and C++ to allow us to generate a PWL random waveform of as long a length as required. It is used as a piece wise linear signal and can generate the random signal as required.Please contact us through our website located at http://www.signalpro.biz for more information about this circuit simulation tool.

What is the difference between, an ASIC, an analog ASIC, a rf ic or a MMIC?

There are a number terms that are used frequently to describe the various forms of semiconductor devices used in the industry. An ASIC is one of them. Other terms are rf ic/ wireless ic, an analog ASIC, a MMIC and so on. So what are the differences between these devices? Ultimately all of these devices are semiconductor integrated circuits, indicated by the ic ( or integrated circuit abbreviation). However there are some differences between the various forms of these integrated circuits that lead to the differing nomenclature. Generally if there is no descriptive abbreviation before or after the "ic", then an ASIC is considered to be a digital device consisting of logic gates, digital memories, microprocessors or microcontrollers and associated circuits all integrated on to a relatively large piece of silicon. An analog ASIC or an analog ic is usually made up of mostly analog circuitry such as amplifiers, comparators, A/D converters, D/A converters,operational amplifiers, analog comparators, voltage references, regulators, etc. A pure analog ASIC or ic operates in the analog domain. It is usually smaller in size than a typical digital ASIC. An rf ic is distinguished by integrated circuitry such as transmitters, receivers, PLLs, modulators, frequency multipliers, rf amplifers, rf power amplifiers, mixers, inductors, transformers, baluns etc. An rf ic also operates at higher frequencies ( typically up to 1 Ghz). A mmic is a monolithic microwave integrated circuit. It may have the same type of circuitry as an rf ic but the frequencies of operation are much higher that rf ics. Currently mmics may be found operating at frequencies in excess of a 100 Ghz. A further type of device referred to as a mixed signal ic has both analog and digital circuitry on it. Sometimes the digital ciruitry is dominant sometines the analog circuitry is dominant.

What ia an ASIC? Why use it?

ASIC stands for "Application Specific Integrated Circuit". This means that an ASIC is designed to be used in very specific applications. Another term for it is "custom" chip. For ASICs a customer specifies certain requirements and specifications and the ASIC supplier then designs to those specifications and supplies the ASIC to the buyer. As such, ASIC has become a generic term. The usage of ASICs has become popular owing to a number of features that ASICs offer. First, the ASIC is usually very small. So it saves space on a board or enclosure that the customer may be using. In some cases there is no way out for the customer,but to use an ASIC. This may be the case, for instance for hearing aids, watches, cell phones. ( Although, strictly speaking a cell phone uses a lot of standard devices in addition to ASICs).An ASIC can be a great cost reduction tool.Insertion costs, discrete device costs, manufacturing costs and other associated costs csn be saved by using ASICs. An ASIC is a very useful tool when it comes to hiding intellectual property ( IP). Most of the circuitry is inside a very small package and can be made to be almost impossible to reverse engineer. Obviously a well designed ASIC can also increase reliabity significantly. No wires to come loose, nor connectors to fail etc. All in all an ASIC can be very useful indeed. To read more about designing an ASIC for yourself please see the article in this blog.

The ISM band: A review of the essentials.

In 1985 the Federal Communications Commission issued rules permitting “ intentional radiators” to use the “ Industrial, Scientific and Medical (ISM) Bands ( 902-928, 2400-2483.5, 5725-5850 Mhz) at power levels of up to one Watt without end-user licenses. Originally these bands had been reserved for unwanted, but unavoidable emissions from industrial and other processes, but they also supported a few ( often military) communications users. The new rules led to the development of a large number of consumer and professional products and is considered to be an important step towards the development of wireless computing or multimedia applications. Applications in the ISM band include, wireless LANs, short range links for advanced traveller systems ( electronic toll collection), garage door openers, home audio distribution, cordless phones, private point to point links, remote control, wireless telemetric systems ( e.g electrical power consumption monitoring) etc. Applications seem to be limited by the imagination rather than technology. A drawback of the ISM band is lack of any protection against interference. In particular microwave ovens limit the useful range of such communications devices. The techteam at Signal Processing Group Inc. recently released a brief whitepaper on the ISM band. Interested readers can find this under the "Engineer's Corner" menu item in the SPG website located at http://www.signalpro.biz.

Thermal modeling of devices and subsystems

After a number of mishaps in the design of power ICs and modules with respect to devices blowing up it was decided that we would go back to first principles and understand thermal effects and furthermore use thermal modeling to design better, safer and robust ( with respect to thermal operation) devices and modules. In our attempt to do this we came across many different types of information in the literature concerning thermal design. From the very simplistic thermal resistance and power relationships to fairly complicated thermal models. We also came across thermal modeling software information. This was in the year 2008. We took this information and wrote a brief thermal modeling technical note in the hope that we would have less incidents of thermally caused destructive events. Another interesting result of this was that we were able to set up thermal models of MCMs and devices that were not yet in existence and study the effects of thermals on these to - be devices. These models were built up in MATLAB/SIMULINK and were still fairly simple. We used commercially available thermal modeling software for more complex models. All this effort did help and in the end we were able to meet our thermal design goals in a large number of projects. The initial note was released for publication and now resides in: www/signalro.biz >> engineer's corner for those interested in thermal modeling or thermal effects. We acknowledge the contribution made to thermal modeling by a number of authors both on and off the web.

Wireless design: substrates and laminates

Yesterday we spent an absolutely intense two hours in discussions of substrates for RF and high frequency design with a couple of experts. Frequencies from about 1 Ghz to 77 Ghz were in play. The amazing part of the discussions was the level of parameters to be considered, not only in the manufacture of the laminates but also the layout of the interconnect, filters, transmission lines, and heat sinking.For high speed digital the control of the impedance/constant line width was more of a factor, unlike in RF where multiple line widths and shapes are in common use. A multitude of transmission lines are used in a bewildering array of combinations. Other parameters such as the glass weave and its impact on impedance was a discussion worth having. Three laminates emerged as winners for the a large number of applications in design. The venerable FR4 was buried under the the new requirements at 77 Ghz and even at 24 Ghz.The impact of DF and DK ( buzz words of course to be treated in some detail in subsequent posts). The use of materials and their trade-offs were fascinating. The size of the material sold has also gone through revisions and large sizes are now common. Gone are the limits of 18 X 24. The other very interesting issue that surfaced was the role of, and difficulty in, testing of not only devices but also the substrates themselves. The relationships between the thickness and the width of lines changes from the simple expressions we all knew. The difficulty of modeling has increased and very few CAD tools appear to have the capability to do what is needed. Only one CAD tool was mentioned several times as a recommended one for design and modeling at the high performance levels. Some very interesting numbers for insertion loss and actual measured values of permittivity and loss tangents were presented and argued over. Very interesting empirical design equations and data was presented as well. In this discussion the effect of the roughness factor was presented and emphasized. Finally a detailed discussion on the materials of construction such as resins,fillers and reinforcements ended the presentations. In short a very interesting couple of hours. Interested parties may contact us about these subjects through our website at www.signalpro.biz>>contact.

The role of the heatsink in higher power devices

As power circuit designs and devices proliferate in products such as LED drivers, HID lighting, motor control and electric vehicles it is becoming important to understand themal effects in active devices. All active devices dissipate power, and power active devices dissipate lots of power. This power dissipation creates heat which must be removed by some means to prevent excessive heat buildup inside a package or module which ultimately would lead to destruction of the appliance, circuit or device. One of the ways devices can be made safer, thermally that is, is the use of a passve heat sink. The role of the heat sink in active device thermal management is explored in a recent report released by Signal Processing Group Inc.'s technical staff and may be found in: http://www.signalpro.biz>engineer's corner>heatsink.pdf.

Decimation filters for oversampled digital signals

A typical filter used as the pre-decimation filter for an oversampled A/D is the Hogenauer filter, also called the CIC filter. These filters have some advantages which make them particularly suitable for use as decimation filters. In general the output stream from a OSR A/D is a 1 bit high frequency digital signal. The 1 bit signal has to be downconverted in frequency and increased in bit width. This is the fundamental decimation operation. Hogenauer filters offer the following advantages (1) No multipliers are needed. (2) No storage is needed for filter coefficients. (3)Intermediate storage is reduced by integrating at the high sampling rate and comb filtering at a low rate. (4) The structure of the CIC filters is very uniform, using only two basic building blocks. (5) Little external control or complicated local timing is required. (6) The same design can easily be used for a wide range of rate change factors with the addition of a scaling unit. As a result of these advantages Hogenauer filters have been used and continue to be used in overampled systems. A technical report prepared by technical staff at Signal Processing Group Inc. is now available in a series of posts that deal with the Hogenauer filter as well as OSR A/D converters. It was assumed that since the CIC filter is an important component at the backend of an OSR ADC, understanding the design parameters of this filter is essential to the design of the overall OSR ADC. Subsequent posts to this one deal with the details of design for decimation filters. The paper may be found at http://www.signalpro.biz>engineer's corner.

Random signal generation for PSPICE/SPICE

The SPICE programs we use for circuit simulation do not have a direct way to generate random waveforms. i.e. there is no voltage or current source which can be attached to a circuit node and which can generate a random signal for analysis. As a result we had to develop code on MATLAB and C++ to allow us to generate a PWL random waveform of as long a length as required. It is used as a piece wise linear signal and can generate the random signal as required.Please contact us through our website located at http://www.signalpro.biz for more information about this circuit simulation tool.

Adjacent channel power ratio

In multicarrier systems, the carriers can be spaced quite close to each other. When this is the case a quantity referred to as the adjacent channel power ratio or ACPR becomes important. As mentioned above, multicarrier systems have a number of carriers which may generate signals whose power may add in phase. As more tones or signals start interacting, the peak additive power will increase. The average power of these signals may well be within the dynamic range of the system. However, the peaks of power may exceed the dynamic range. This will cause non linear odd - order distortion in the system. When this happens it results in adjacent channel power output or ACP. The ACPR is the ratio of the system output power at an offset frequency with respect to the power of the channel of interest. This can be considered one measure of linearity of a transmitter ( or RFPA). If the transmitter or the PA generates unwanted sidebands at an offset frequency that lies within the passband of an adjacent channel. For a given modulation scheme, the relationship between third order intermodulation products and the ACPR at a given power level is: ACPR = IMR(2-tone) + 10*log[ n**3/(16X + 4Y)].For a given modulation scheme, the relationship between third order intermodulation products and the ACPR at a given power level is: ACPR = IMR(2-tone) + 10*log[ n**3/(16X + 4Y)]. Here X and Y are given by:

X = (2n**3 – 3n**2 – 2n)/24 + [mod(n/2)]/8.0

And

Y = n**3 – {[mod(n/2)]/4.0}

All ratios here are in dBc. i.e. the ratio of the two tone intermodulation to signal carrier IMR and ACPR. Check out our website and engineer's corner. Go to http://www.signalpo.biz.

Dot rule for transformers

The dot rule for transformers is a convention used to present the voltage and current relationships and phase. It is a simple rule and therefore sometimes easy to forget, if not used every day. In order to use this rule we need to know two things: (1) The right hand rule for current and fluxes. i.e. If the fingers of the right hand are wrapped around the core in the direction of current flow, then the thumb will point in the direction of the flux. (2)If the current enters a dotted terminal, it causes a positive voltage at the other dotted terminal.If a current leaves a dotted terminal, it induces a negative voltage at the other dotted terminal. For more technical articles and items of interest please visit our website at http://www.signalpro.biz.

Input impedance of a common emitter differential amplifer with emitter degeneration

Use of the emitter coupled bipolar differential amplifier is prolific. In addition a good way to stablize gain and bias stability is the use of a emitter degeneration resistor. This post simply presents, without proof, what happens to the input impedance of the differential device when degeneration is used. First one has to know the rpi of the bipolar small signal model. This is calculated as: Beta0/gm. Where Beta0 is the dc gain of the bipolar. If no degeneration is used, this is the input impedance of the transistor. When a degeneration resistor is used then the impedance rises significantly. The rise in input impedance is: (Beta + 1)*Re. Here Beta is the current gain at the particular bias point and frequency and Re is the degeneration resistor. Therefore the total input impedance rises to rp1+(Beta+1)*Re. For other items of interest please visit our website at http://www.signalpro.biz.

PRBS power calculations using a sinc squared function integration

The power in a PRBS NRZ signal is expressed as a sinc squared function of the independent variable x. In order to calculate the power in this signal from 0 to some arbitrary x a definite integral of the sinc squared function has to be found. This is not an easy task. Having searched the web for ready solutions of this problem very few relevant references were found. Therefore a technique was evolved from series expansions of the sinc and sinc squared functions. The accuracy of the estimates found by using this technique is completely dependent on the engineer. We found that using just four or five terms in the expansion allowed us to calculate to within accuracies of interest to us. The technical report can be found in the engineer's corner in the SPG website located at http://www.signalpro.biz.

Why 50 Ohms?

Has anyone wondered why we use 50 Ohms as the the reference resistance in so many of our designs. Why 50 Ohm seems to be a defacto standard. We normalize to 50 Ohm; we use 50 Ohm in our oscilloscopes; we pick 50 ohms as a good convenient reference resistor. But how did this happen. Where did this 50 Ohm factor come from. We ran across a explanation which sounds reasonable enough and decided to post it to this blog. Standard coaxial lines in England in the 1930's used a commonly available center conductor which turned out to be 50 Ohms! Others say that for minimum signal attenuation, the transmission line characteristic impedance is 77 Ohm. For maximum power handling it is around 30 Ohm. A good compromise is 50 Ohm for both performance parameters. So this is how 50 Ohm became a convenient impedance level!?

Lumped and distributed elements

How does one determine whether to treat a component as a lumped or distributed one? The answer is, that if the the element size is greater than lambda/20, where lambda is the effective wavelength of the signal associated with the element, then it should be treated as a distributed component or element. This means that for typical discrete designs, the lumped approximations are valid for frequencies in the 500 to 1000 Mhz range. For ICs the frequency range is much larger because of the small size of the elements encountered there. This range may be up to 10 Ghz. One has to ask, where did the 5% of lambda come from? It is like most other things in practical engineering an approximation and a thumb rule. It should be considered a guideline. A distributed model is usually more accurate for any frequency above DC but experience says that the 5% guideline is a good transition value. Note: The effective lambda is the lambda in free space divided by the square root of the effective dielectric constant. The effective dielectric constant in homogeneous media is simply the relative permittivity. For non-homogeneous media is not. Usually for non-homogeneous systems such as microstrip the effective dielectric constant is less than the relative permittivity.

First order filter parameter calculation algorithm

A recurring problem in ac filter circuit design, is the calculation of attenuation at a particular frequency or conversely the calculation of a frequency given the attenuation. In addition related calculations deal with estimations of time constants and filter parameters such as resistance and capacitance. These calculations play a crucial role in the design of anti-aliasing filters, low pass filters, phase lock loops etc. A paper published recently by the techteam at Signal Processing Group Inc, documents these calculations and provides examples for interested readers, cookbook fashion. The paper is located at http://www.signalpro.biz >engineer's corner.

The MOS Varactor: An introduction

In many IC designs frequency based trimming or control is required. For instance a filter may need to to be trimmed for corner frequencies. A PLL VCO needs to be controlled by changing the frequency based on its feedback signal. An adaptive equalizer needs to shift its pole-zero configuration. These and many other related applications need a device to be voltage controllable, and offer a change of reactance. The varactor is a useful component that is used frequently to do this. In general varactors are assumed to be junction type devices where the depletion capacitance can be changed to vary the reactance. In CMOS or BiCMOS processes another type of varactor is available, almost as a byproduct of the MOSFET structure. This is the MOS varactor It seems that every CMOS process has the capability to produce a MOS varactor. However, although the varactor is available it may have some limitations of Q and sensitivity. In addition CMOS technology vendors do not characterize or optimize their MOS varactors. This is left to those specialized technology vendors who offer high performance or RF type processes. A recent report on the MOS Varactor is available as an introduction at http://www.signalpro.biz/ > engineer's corner for interested parties.

Useful identities for bipolar design

Bipolar design has been popular for a very long time. It continues to provide a device that is being used today in various forms. In standard bipolar processes, in combination with CMOS in BiCMOS processes, in high current designs, in high voltage with high current designs. Technology and device vendors keep improving their technologies and processes. Recently the advent of SiGe technology also provides a very high performance bipolar device. For the design engineer a set of identities which provides a way for simple hand calculations of the bipolar device for use in a circuit can be useful. Ultimately, the circuit design can be either breadboarded or simulated to evaluate performance. However, hand calculations can be and should be a first step. To facilitate this process the technical team at Signal Processing Group Inc., have recently released a brief paper on some useful bipolar design identities. This is available on the SPG website in the " Engineer's corner". Please visit http://www.signalpro.biz.

De-embedding in high frequency measurements

High frequency measurements for circuits such as MMICs and high speed digital circuits are made using some kind of Vector Network Analyzer ( VNA) or some kind of TDR instrument. In most cases the DUT ( device under test) is mounted on a test fixture which probably has an input connector and microstrip and an output connector and microstrip. The measurements are to be made on the characteristics of the DUT. To do this the test fixtures have to be de-embedded. This technique and its basics form the subject of the latest brief paper from the technical team at Signal Processing Group Inc. It can be found at http://www.signalpro.biz in the Engineer's Corner.

The wave number β, or the phase constant definition

β is an important quantity used in understanding transmission lines and waveguides. It is not intuitive so this treatment presents a brief explanation of the quantity in the analysis of transmission lines, waveguide and other wave systems.

Sometimes β is referred to as the phase constant of the line or guide. If the cartesian coordinate system is used and a coordinate, say “z” is used as the direction of wave propagation then βz measures the instantaneous phase at point z on the line with respect to z =0.

In addition, voltage or current on the line is the same at any two points separated in z such that βz differs by multiples of 2π. Since the shortest distance between points where voltage or current is at the same phase is a wavelength, then:


βλ = 2π

( replacing z by λ),

β = 2π/λ

Multi-chip in a package technology

When a designer has a system that is designed with chips with differing voltages, currents, frequencies and special characteristics it is difficult to integrate the system for cost or size reduction. In this case the usual approach is a motherboard - daughter board combination. ( Usually, but not always). Recently it appears that designers are turning to multi-chip in a package technology. In this case a package is used which has die in it assembled in a vertical configuration or a side by side combination. Properly done , this can be a powerful way of getting the job done in a shorter time with less cost than a difficult integration approach. The design of the multi-chip configuration is the key. Some parameters to be considered seriously are temperature effects, parasitic connections, grounding, and frequency performance. Signal Processing Group Inc., is offering a multi-chip in a package design and assembly service for interested users. SPG website is located at http://www.signalpro.biz.

Temperature independent resistor design.

In IC technology all resistor materials have an associated temperature coefficient. Most commonly, resistors are made from polysilicon, diffusion of various kinds and metal. The most common of these resistors is poly and diffusion. In certain applications a temperature independent resistor may be required. In order to do this one has to search the technology properties to see if there are resistor materials in the technology that can provide (1) An appropriate sheet resistance and (2) opposite temperature coefficients. Almost all semiconductor technologies provide this. Once the materials are established a first order temperature independent resistor may be synthesized as shown in a recent report released by Signal Processing Group Inc. This report may be found at:
http://www.signalpro.biz>engineer's corner.

Ground loops in analog and wireless design

Ground loops are parasitic paths in a PCB or an IC that can cause a number of bad effects. These are caused primarily by bad layout, either accidently or because of lack of experience. In order to avoid ground loops one has to understand: (1) What they are, (2) how they are caused,and (3)how to eliminate them or minimize their effects. A good review paper on this subject was recently released for publication by the techteam at Signal Processing Group Inc., and is available for review at their "engineering pages" in the website located at http://www.signalpro.biz.

1.2V battery to 3.3v and 5.0V output power PCB design

Recent needs in low power and single battery ( 1.2V) design demand a power converter circuit. A recent requirement for a handheld FM receiver ( multichannel) necessitated
the design of a voltage supply converter using off the shelf devices. After a thorough search for off the shelf devices which could be used to realize such a converter a device was chosen from a popular manufacturer and the design was started. Here are some issues that we encountered, ( perhaps not new, but nonetheless need to be mentioned). Our biggest challenges, suprizingly enough had very little to do with the IC that we used. This was because the vendor had excellent technical support and application notes and had a well organized technical support environment. Our requests were handled within a 24 to 48 hour turnaround. The challenges that were difficult had to do with selecting, acquiring and using the passive components. These were harder to find and technical support left much to be desired. In spite of these issues we managed to finish the design in time and test the board. It worked quite well and provided 3.3V at close to 1.0A and 5.0V at close to 0.5A as needed with a 20% margin. Interested readers are invited to contact us through our website at http://www.signalpro.biz.

RF Design: Electrical length

Sooner or later, the design engineer who is working in microwave or high frequency electronics, is going to come up against the concept of electrical length. In order to understand this concept lets work out the following arithmetic:

1.0 The wave number or phase constant = β = 2π/λ

For those unfamiliar with this, we recommend looking up the description of this quantity in the SPG blog at (http://signalpro-ain.blogspot.com/).

2.0 The electrical length is defined by θ = βl where l = physical length

3.0 θ = βl = (l/ λ) *360 degrees

Here λ is the wavelength of the signal in the applicable dielectric ( or sometimes called the guide wavelength).

4.0 For a frequencies in Ghz, this becomes: [360 * fGhz * l(cm) * √εeff]/30 cm


In this case frequency is in Ghz, physical length is in centimeters.

For example:

Let frequency be 1 Ghz.
Let λ = 0.8 λ(air) or √εeff = 1.25
Let l = 0.1 meters = 0.1E2 centimeters

Then :

θ = [360* 1*0.1E2*1.25]/30 degrees

θ = 150 degrees

Lumped element filters to transmission line equivalents

As frequencies increase in filters, lumped elements no longer satisfy the requirements for various reasons ( parasitics, accuracy etc). At this point the designer may choose to convert the lumped element filter to a distributed element filter. One of the techniques used is transmission line stubs in the conversion. This technique is described in a white paper released from Signal Processing Group Inc. recently. The paper may be found at http://www.signalpro.biz >> engineer's corner by interested readers.

Definitions of the Q factor

Definitions of the Q factor


1.0 Unloaded Q : Energy stored in the component/Energy dissipated in component.

2.0 Loaded Q:Energy stored in component/Energy dissipated in component and
external circuit./load.

Thermal coefficients for the dielectric constant of PCB materials

In a recent group discussion on Linkedin, a member asked about the thermal coefficients of FR-4 and other common pcb materials. For interested persons a really good paper by John Coonrod, in the September issue of www.onboard-technology.com tabulates these coefficients.

PCB electrical and thermal parameters for design

PCB design is not only a science but also an art, as every PCB designer knows. However, the art of design is predicated by the science to a certain extent and in order to do a good job a designer has to know certain parametric effects of PCBs. A recent whitepaper released by Signal Processing Group Inc., offers a brief treatment of the first order electrical and thermal parameters for PCB design that can be useful in PCB design, both for understanding, as well as robustness of design. The paper can be accessed via the "Engineer's corner" menu item in the SPG website located at http://www.signalpro.biz.

How many times did Thomas Edison fail?

A light hearted post. Having read a number of books, both on Thomas Edison's life as well as motivational we have come to the conclusion that no one really knows how many times Edison failed before he got his first light bulb working. Here are the different numbers so far: 6000 times, 11000 times, 21000 times, 1000 times, 10000 times and an astronomical 56000 times!! Perhaps someone out there has other numbers they might want to share with us. We can be contacted on our email at: spg@signalpro.biz.

Why is power transfer and power quantities used in RF design?

It is seen that in high frequency circuits, power transfer and power quantities are used. Typically dBm will be a standard unit in use. The question is: why? The answer to this question is found in relative performance of circuits at high and low frequencies. When frequencies are low, a voltage or current signal applied at an input of a circuit or chip is reproduced quite faithfully in the chip or at the operating terminals of the circuit. The same is true at the outputs. The reason is that parasitic quantities do not play as large a role at low frequencies.The situation is quite different at high or microwave frequencies. At these frequencies the voltage or current signal applied to the input terminal of a device package is not what the active device sees inside the package. The reason is of course, the parasitics of the circuit.If instead of input current or input voltage as the signal quantities we use power delivered to the input port then this problem goes away since reactances do not dissipate power. At the output, if the true available power gain of the device is given, we can calculate accurately what to expect assuming no power is dissipated in the parasitic elements. These reasons are why RF/MMIC circuits are almost always designed with power flow or power transfer considerations

Super-beta or high current gain bipolar transistors

In certain analog ICs it is necessary to have very high input impedance and very low base currents. For such applications, the typical current gains of an integrated npn transistor are not high enough. It is possible to increase the current gain of an npn transistor significantly by improving the base transport efficiency. In this case the base is very narrow ( a few hundred angstroms or less). The collector to emitter breakdown of a structure like this is relatively low ( 2V - 3V) because the collector base depletion layer can punch through the active base region into the emitter. This is the punch-through or "super-beta" transistor. Current gains of 5000 are obtainable using this technique at currents of 20uA or so with a Vce of around 0.5V. The fabrication of super-beta transistors in a standard process can be done by using one extra masking step and diffusion. After the base diffusion for the normal NPN transistors a special mask is used to open up the emitter diffusion for the super-beta transistors. At this stage the emitter of the super-beta transistor is only partially diffused.This step is then followed by the masking and n+ diffusion of the standard npn. Owing to the extra diffusion step for the super-beta transistor, the emitter of the super-beta transistor is diffused slightly deeper
than the normal npn resulting in a narrow base width.

Wireless entrepreneurs alert

This post is not engineering-centric.It is addressed to engineers who may have the entrepreneurial bug. Times have changed so much that there are new opportunities for people who have a developed product and want to profit by their efforts with little or no money expended. The online/cyber world has had a tremendous impact that could not be imaginged only a decade ago. Then an engineer with a product had very few avenues open to him/her to gain from it financially . Today there are a myriad of ways that can be done. For more information about these techniques please contact Signal Processing Group Inc., via the "Contact" menu item in the website located at http://www.signalpro.biz.

Ground loops in analog and wireless design

Ground loops are parasitic paths in a PCB or an IC that can cause a number of bad effects. These are caused primarily by bad layout, circuit design or interconnections either accidentally or because of lack of experience. In order to avoid ground loops one has to understand what they are. A very brief description is given in a recent article by the techteam at Signal Processing Group Inc., and is available for review at their "engineering pages" in the website located at http://www.signalpro.biz.

Half IF spurious response and second order intercept points

An irksome 2nd-order spurious response called the half-IF (1/2 IF) spurious response, is defined for the mixer indices of (m = 2, n = -2) for low-side injection and (m = -2, n = 2) for high-side injection. For low-side injection, the input frequency that creates the half-IF spurious response is located below the desired RF frequency by an amount fIF/2 from the desired RF input frequency. The desired RF frequency is represented by 2400 MHz, and in combination with the LO frequency of 2200 MHz, the resulting IF frequency is 200MHz. For this example, the undesired signal at 2300 MHz causes a half-IF spurious product at 200MHz. For high-side injection, the input frequency that creates the half-IF spurious response is located above (by fIF/2) the desired RF. Note that high side injection implies that the LO frequency is above the RF frequency and low side injection implies that the LO frequency is below the RF frequency.

The second order intercept point is used to predict the mixer performance with respect to the half IF spurious response. For further details please see the article under engineer's corner/engineering pages in our website at www.signalpro.biz.

Load line analysis for RF power amplifiers

The most basic of analyses is the load line analysis for RF power amps ( or for that matter, any power amp). It is true that we all learned this in our formative years. However, it is equally true that we graduated to high performance complicated CAD programs that do so many things in an invisible manner that we no longer want to know ( sometimes) how the tool go to where it got to. A somewhat similar condition is common in digital ASIC design where the designer no longer needs to know how the logic gate works or what its device level parameters are. He or she simply writes the code that enables the design on a high level of abstraction. A brief expose of load line analysis is presented in a newly released paper by SPG and may be found at www.signalpro.biz under engineer's corner for interested readers.

RF Amplifier design: Load pull analysis

In the design of RF power amplifiers it is useful ( and important) to know how the output power of the amplifier gets influenced by changes of the the load impedance under varying conditions. In order to get an understanding of this, a useful technique is "load pull analysis". It is a graphical ( usually) technique that uses the Smith Chart to plot the contours of the load impedance for fixed constant powers. It provides valuable information to the engineer/user about the performance of the amplifier for reasons of assessment of the quality of the amplifier, conditions of operation, design fit or various other parameters. A technical article on the technique has been released by Signal Processing Group Technical staff and is available for perusal by interested parties in www.signalpro.biz>engineer's corner.

Substrates for high frequency design

We spent an absolutely intense two hours in discussions of substrates for RF and high frequency design with a couple of experts. Frequencies from about 1 Ghz to 77 Ghz were in play. The amazing part of the discussions was the level of parameters to be considered, not only in the manufacture of the laminates but also the layout of the interconnect, filters, transmission lines, and heat sinking.For high speed digital the control of the impedance/constant line width was more of a factor, unlike in RF where multiple line widths and shapes are in common use. A multitude of transmission lines are used in a bewildering array of combinations. Other parameters such as the glass weave and its impact on impedance was a discussion worth having. Three laminates emerged as winners for the a large number of applications in design. The venerable FR4 was buried under the the new requirements at 77 Ghz and even at 24 Ghz.The impact of DF and DK ( buzz words of course to be treated in some detail in subsequent posts). The use of materials and their trade-offs were fascinating. The size of the material sold has also gone through revisions and large sizes are now common. Gone are the limits of 18 X 24. The other very interesting issue that surfaced was the role of, and difficulty in, testing of not only devices but also the substrates themselves. The relationships between the thickness and the width of lines changes from the simple expressions we all knew. The difficulty of modeling has increased and very few CAD tools appear to have the capability to do what is needed. Only one CAD tool was mentioned several times as a recommended one for design and modeling at the high performance levels. Some very interesting numbers for insertion loss and actual measured values of permittivity and loss tangents were presented and argued over. Very interesting empirical design equations and data was presented as well. In this discussion the effect of the roughness factor was presented and emphasized. Finally a detailed discussion on the materials of construction such as resins,fillers and reinforcements ended the presentations. In short a very interesting couple of hours. Interested parties may contact us about these subjects through our website at www.signalpro.biz>>contact.

adjacent channel power ratio (ACPR)

In multicarrier systems, the carriers can be spaced quite close to each other. When this is the case a quantity referred to as the adjacent channel power ratio or ACPR becomes important. As mentioned above, multicarrier systems have a number of carriers which may generate signals whose power may add in phase. As more tones or signals start interacting, the peak additive power will increase. The average power of these signals may well be within the dynamic range of the system. However, the peaks of power may exceed the dynamic range. This will cause non linear odd - order distortion in the system. When this happens it results in adjacent channel power output or ACP. The ACPR is the ratio of the system output power at an offset frequency with respect to the power of the channel of interest. This can be considered one measure of linearity of a transmitter ( or RFPA). If the transmitter or the PA generates unwanted sidebands at an offset frequency that lies within the passband of an adjacent channel. For a given modulation scheme, the relationship between third order intermodulation products and the ACPR at a given power level is: ACPR = IMR2-tone + 10*log[ n**3/(16X + 4Y)].For a given modulation scheme, the relationship between third order intermodulation products and the ACPR at a given power level is: ACPR = IMR(2-tone) + 10*log[ n**3/(16X + 4Y)]. Here X and Y are given by:

X = (2n**3 – 3n**2 – 2n)/24 + [mod(n/2)]/8.0

And

Y = n**3 – {[mod(n/2)]/4.0}

All ratios here are in dBc. i.e. the ratio of the two tone intermodulation to signal carrier IMR and ACPR. Check out our website and engineer's corner. Go to http://www.signalpo.biz.

De - embedding in high frequency measurements

High frequency measurements for circuits such as MMICs and high speed digital circuits are made using some kind of Vector Network Analyzer ( VNA) or some kind of TDR instrument. In most cases the DUT ( device under test) is mounted on a test fixture which probably has an input connector and microstrip and an output connector and microstrip. The measurements are to be made on the characteristics of the DUT. To do this the test fixtures have to be de-embedded. This technique and its basics form the subject of the latest brief paper from the technical team at Signal Processing Group Inc. It can be found at http://www.signalpro.biz in the Engineer's Corner.

The wavenumber β or the phase constant

β is an important quantity used in understanding transmission lines and waveguides. It is not intuitive so this treatment presents a brief explanation of the quantity in the analysis of transmission lines, waveguide and other wave systems.

Sometimes β is referred to as the phase constant of the line or guide. If the cartesian coordinate system is used and a coordinate, say “z” is used as the direction of wave propagation then βz measures the instantaneous phase at point z on the line with respect to z =0.

In addition, voltage or current on the line is the same at any two points separated in z such that βz differs by multiples of 2π. Since the shortest distance between points where voltage or current is at the same phase is a wavelength, then:


βλ = 2π

( replacing z by λ),

β = 2π/λ

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Wireless design: electrical length

Sooner or later, the design engineer who is working in microwave or high frequency electronics, is going to come up against the concept of electrical length. In order to understand this concept lets work out the following arithmetic:

1.0 The wave number or phase constant = β = 2π/λ

For those unfamiliar with this, we recommend looking up the description of this quantity in the SPG blog at (http://signalpro-ain.blogspot.com/).

2.0 The electrical length is defined by θ = βl where l = physical length

3.0 θ = βl = (l/ λ) *360 degrees

Here λ is the wavelength of the signal in the applicable dielectric ( or sometimes called the guide wavelength).

4.0 For a frequencies in Ghz, this becomes: [360 * fGhz * l(cm) * √εeff]/30 cm


In this case frequency is in Ghz, physical length is in centimeters.

For example:

Let frequency be 1 Ghz.
Let λ = 0.8 λ(air) or √εeff = 1.25
Let l = 0.1 meters = 0.1E2 centimeters

Then :

θ = [360* 1*0.1E2*1.25]/30 degrees

θ = 150 degrees

Why is power transfer and power quantities used in high frequency design

It is seen that in high frequency circuits, power transfer and power quantities are used. Typically dBm will be a standard unit in use. The question is: why? The answer to this question is found in relative performance of circuits at high and low frequencies. When frequencies are low, a voltage or current signal applied at an input of a circuit or chip is reproduced quite faithfully in the chip or at the operating terminals of the circuit. The same is true at the outputs. The reason is that parasitic quantities do not play as large a role at low frequencies.The situation is quite different at high or microwave frequencies. At these frequencies the voltage or current signal applied to the input terminal of a device package is not what the active device sees inside the package. The reason is of course, the parasitics of the circuit.If instead of input current or input voltage as the signal quantities we use power delivered to the input port then this problem goes away since reactances do not dissipate power. At the output, if the true available power gain of the device is given, we can calculate accurately what to expect assuming no power is dissipated in the parasitic elements. These reasons are why RF/MMIC circuits are almost always designed with power flow or power transfer considerations.

Definitions of the Q factor

Definitions of the Q factor


1.0 Unloaded Q : Energy stored in the component/Energy dissipated in component.

2.0 Loaded Q: Energy stored in component/Energy dissipated in component and
external circuit./load.

Ferrite beads are useful components

Ferrite beads are a very low cost and easy way to add high frequency isolation loss in a circuit without a power loss at DC and low frequencies. Ferrite beads are most effective at frequencies in excess of 1.0 Mhz. When these are used with the appropriate parallel capacitance, they provide high frequency decoupling and parasitic suppression. A brief paper on ferrite beads has been released by Signal Processing Group Inc and may be found at http://www.signalpro.biz>>engineer’s corner.

Oscillator noise

Oscillators are very important components of any electronic system, be it in communications, signal processing, data acquisition or power electronics. In short, one always bumps up against oscillators in electronic design. Among other things that an engineer faces when designing oscillators or VCOs is the problem of ever present noise. It becomes important to understand the basics of noise sources and quantities in oscillators. Recently Signal Processing Group Inc., released an interesting paper on just this very subject. The paper may be accessed from the SPG website at http://www.signalpro.biz under the engineer's corner menu item.

Distributed element microwave filters

As frequencies increase in filters, lumped elements no longer satisfy the requirements for various reasons ( parasitics, accuracy etc). At this point the designer may choose to convert the lumped element filter to a distributed element filter. One of the techniques used is transmission line stubs in the conversion. This technique is described in a white paper released from Signal Processing Group Inc. recently. The paper may be found at http://www.signalpro.biz >> engineer's corner by interested readers.

Very Low power wireless design

Power has become a limiting factor in many applications. Specially in portable products, wireless applications and temperature limited products and systems. Therefore it is useful to investigate and develop really low power, "ultra" low power devices ( Integrated circuits and modules) that can be used to build more complex systems. techniques such as low voltage devices, sub-threshold CMOS circuits, energy harvesting etc. all play a part in the design of such devices. A number of low power designs can be done now with state of the art technology, specially for wireless ( RF amplifiers, mixers,detectors, LC oscillators, etc) that were not possible even a few years ago.It is a fascinating area of design effort. Over the past few years the techteam at Signal Processing Group Inc, has been involved in the design of low power circuits for use in RFID, 1.2V battery powered systems and short range wireless sensor based "data tubes". Some of this work is available for discussion. For details or for help in the design of these type of devices please contact SPG at http://www.signalpro.biz.

Radio wave path loss calculations and considerations

Radio signals suffer a path loss in free space ( as well as in other media). Recently a brief article was released by SPG technical staff which provides some simple expressions for the calculation of this free space path loss These expressions are useful in quick calculations of received power at a close in distance for an antenna. Using these expressions, and the formula for calculating the induced voltage in an antenna as a result of the received power, is a starting point for more sophisticated calculations. This paper can be found at http://www.signalpro.biz >> engineer's corner.

RAKE Receiver for multipath communications

Multipath in wireless systems is what happens when a transmitted signal travels along multiple paths ( e.g. as a result of reflections from surfaces). At the receiver these received signals can add or subtract depending on the amplitude and phase of the signals causing what is known as frequency selective fading. Another name for multipath interference. Obviously this is a real problem for cellular systems and many different types of solutions have been proposed and are being used. One of these solutions is the so-called RAKE receiver. The RAKE receiver has a number of "sub-receivers" called fingers, each assigned to a different multipath component. Each finger independently receives a single multipath signal. Subsequently, the contribution of all fingers are combined in order to make the most use of the different transmission characteristics of each transmission path. The important parameters that need to be estimated as accurately as possible are, the time of arrival of each finger signal, its amplitude and phase. Knowing these, the signals are combined in what is known as a maximal ratio combiner or a MRC. In this combiner each individual finger signal is weighted by the complex valued channel gain. The effect of this weighting is to compensate for the phase shifts in the channel and the change in amplitude. As this is done successfully significant improvement in signal reception is obtained. For details on a RAKE receiver design please contact Signal Processing Group Inc., through the website located at http://www.signalpro.biz.